/dts-v1/;

/ {
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	compatible = "ti,am335x-bone", "ti,am33xx";
	interrupt-parent = <0x1>;
	model = "TI AM335x BeagleBone";

	chosen {
	};

	aliases {
		i2c0 = "/ocp/i2c@44e0b000";
		i2c1 = "/ocp/i2c@4802a000";
		i2c2 = "/ocp/i2c@4819c000";
		serial0 = "/ocp/serial@44e09000";
		serial1 = "/ocp/serial@48022000";
		serial2 = "/ocp/serial@48024000";
		serial3 = "/ocp/serial@481a6000";
		serial4 = "/ocp/serial@481a8000";
		serial5 = "/ocp/serial@481aa000";
		d_can0 = "/ocp/d_can@481cc000";
		d_can1 = "/ocp/d_can@481d0000";
		usb0 = "/ocp/usb@47400000/usb@47401000";
		usb1 = "/ocp/usb@47400000/usb@47401800";
		phy0 = "/ocp/usb@47400000/usb-phy@47401300";
		phy1 = "/ocp/usb@47400000/usb-phy@47401b00";
		ethernet0 = "/ocp/ethernet@4a100000/slave@4a100200";
		ethernet1 = "/ocp/ethernet@4a100000/slave@4a100300";
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>;
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0x0>;
			operating-points = <0xf4240 0x149d58 0xc3500 0x139b88 0xafc80 0x139b88 0x927c0 0x12b128 0x7a120 0x112a88 0x493e0 0x112a88 0x43238 0x112a88>;
			voltage-tolerance = <0x2>;
			platform-opp-modifier = <0x2>;
			clocks = <0x3>;
			clock-names = "cpu";
			clock-latency = <0x493e0>;
			cpu0-supply = <0x4>;
		};
	};

	soc {
		compatible = "ti,omap-infra";

		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};
	};

	pinmux@44e10800 {
		compatible = "pinctrl-single";
		reg = <0x44e10800 0x238>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		pinctrl-single,register-width = <0x20>;
		pinctrl-single,function-mask = <0x7f>;
		pinctrl-names = "default";

		user_leds_default {
			pinctrl-single,pins = <0x54 0x7 0x58 0x17 0x5c 0x7 0x60 0x17>;
			linux,phandle = <0x52>;
			phandle = <0x52>;
		};

		user_leds_sleep {
			pinctrl-single,pins = <0x54 0x27 0x58 0x27 0x5c 0x27 0x60 0x27>;
			linux,phandle = <0x53>;
			phandle = <0x53>;
		};

		pinmux_i2c0_pins {
			pinctrl-single,pins = <0x188 0x30 0x18c 0x30>;
			linux,phandle = <0xf>;
			phandle = <0xf>;
		};

		pinmux_uart0_pins {
			pinctrl-single,pins = <0x170 0x30 0x174 0x0>;
			linux,phandle = <0xd>;
			phandle = <0xd>;
		};

		cpsw_default {
			pinctrl-single,pins = <0x110 0x30 0x114 0x0 0x118 0x30 0x11c 0x0 0x120 0x0 0x124 0x0 0x128 0x0 0x12c 0x30 0x130 0x30 0x134 0x30 0x138 0x30 0x13c 0x30 0x140 0x30>;
			linux,phandle = <0x2a>;
			phandle = <0x2a>;
		};

		cpsw_sleep {
			pinctrl-single,pins = <0x110 0x27 0x114 0x27 0x118 0x27 0x11c 0x27 0x120 0x27 0x124 0x27 0x128 0x27 0x12c 0x27 0x130 0x27 0x134 0x27 0x138 0x27 0x13c 0x27 0x140 0x27>;
			linux,phandle = <0x2b>;
			phandle = <0x2b>;
		};

		davinci_mdio_default {
			pinctrl-single,pins = <0x148 0x70 0x14c 0x10>;
			linux,phandle = <0x2c>;
			phandle = <0x2c>;
		};

		davinci_mdio_sleep {
			pinctrl-single,pins = <0x148 0x27 0x14c 0x27>;
			linux,phandle = <0x2d>;
			phandle = <0x2d>;
		};

		pinmux_mmc1_pins {
			pinctrl-single,pins = <0xf0 0x30 0xf4 0x30 0xf8 0x30 0xfc 0x30 0x100 0x30 0x104 0x30 0x1a0 0x37 0x160 0x2f>;
			linux,phandle = <0x13>;
			phandle = <0x13>;
		};

		pinmux_mmc1_pins_sleep {
			pinctrl-single,pins = <0xf0 0x27 0xf4 0x27 0xf8 0x27 0xfc 0x27 0x100 0x27 0x104 0x27 0x1a0 0x27 0x160 0x27>;
			linux,phandle = <0x14>;
			phandle = <0x14>;
		};

		pinmux_emmc_pins {
			pinctrl-single,pins = <0x80 0x32 0x84 0x32 0x0 0x31 0x4 0x31 0x8 0x31 0xc 0x31 0x10 0x31 0x14 0x31 0x18 0x31 0x1c 0x31>;
		};

		spi1_pins {
			pinctrl-single,pins = <0xd0 0x17 0xd4 0x17 0x190 0x13 0x198 0x13 0x19c 0x13>;
			linux,phandle = <0x22>;
			phandle = <0x22>;
		};
	};

	ocp {
		compatible = "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;
		ti,hwmods = "l3_main";
		clocks = <0x5>;
		clock-names = "fck";

		interrupt-controller@48200000 {
			compatible = "ti,omap2-intc";
			interrupt-controller;
			#interrupt-cells = <0x1>;
			ti,intc-size = <0x80>;
			reg = <0x48200000 0x1000>;
			linux,phandle = <0x1>;
			phandle = <0x1>;
		};

		edma@49000000 {
			compatible = "ti,edma3";
			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
			reg = <0x49000000 0x10000 0x44e10f90 0x10>;
			interrupts = <0xc 0xd 0xe>;
			#dma-cells = <0x1>;
			dma-channels = <0x40>;
			ti,edma-regions = <0x4>;
			ti,edma-slots = <0x100>;
			linux,phandle = <0x12>;
			phandle = <0x12>;
		};

		gpio@44e07000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			clocks = <0x6 0x7>;
			clock-names = "fck", "dbclk";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x1>;
			reg = <0x44e07000 0x1000>;
			interrupts = <0x60>;
			linux,phandle = <0x15>;
			phandle = <0x15>;
		};

		gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			clocks = <0x8 0x9>;
			clock-names = "fck", "dbclk";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x1>;
			reg = <0x4804c000 0x1000>;
			interrupts = <0x62>;
			linux,phandle = <0x54>;
			phandle = <0x54>;
		};

		gpio@481ac000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio3";
			clocks = <0x8 0xa>;
			clock-names = "fck", "dbclk";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x1>;
			reg = <0x481ac000 0x1000>;
			interrupts = <0x20>;
		};

		gpio@481ae000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio4";
			clocks = <0x8 0xb>;
			clock-names = "fck", "dbclk";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x1>;
			reg = <0x481ae000 0x1000>;
			interrupts = <0x3e>;
		};

		serial@44e09000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart1";
			clocks = <0xc>;
			clock-names = "fck";
			clock-frequency = <0x2dc6c00>;
			reg = <0x44e09000 0x2000>;
			interrupts = <0x48>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0xd>;
		};

		serial@48022000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart2";
			clocks = <0xe>;
			clock-names = "fck";
			clock-frequency = <0x2dc6c00>;
			reg = <0x48022000 0x2000>;
			interrupts = <0x49>;
			status = "disabled";
		};

		serial@48024000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart3";
			clocks = <0xe>;
			clock-names = "fck";
			clock-frequency = <0x2dc6c00>;
			reg = <0x48024000 0x2000>;
			interrupts = <0x4a>;
			status = "disabled";
		};

		serial@481a6000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart4";
			clocks = <0xe>;
			clock-names = "fck";
			clock-frequency = <0x2dc6c00>;
			reg = <0x481a6000 0x2000>;
			interrupts = <0x2c>;
			status = "disabled";
		};

		serial@481a8000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart5";
			clocks = <0xe>;
			clock-names = "fck";
			clock-frequency = <0x2dc6c00>;
			reg = <0x481a8000 0x2000>;
			interrupts = <0x2d>;
			status = "disabled";
		};

		serial@481aa000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart6";
			clocks = <0xe>;
			clock-names = "fck";
			clock-frequency = <0x2dc6c00>;
			reg = <0x481aa000 0x2000>;
			interrupts = <0x2e>;
			status = "disabled";
		};

		i2c@44e0b000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c1";
			clocks = <0xc>;
			clock-names = "fck";
			reg = <0x44e0b000 0x1000>;
			interrupts = <0x46>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0xf>;
			clock-frequency = <0x61a80>;
			sleep-sequence = <0x2240b6d 0x2241002 0x2240b6d 0x2241002 0x2240b6c 0x2241186 0x2240b6c 0x2241186>;
			wake-sequence = <0x2240b6d 0x2241008 0x2240b6d 0x2241008 0x2240b6c 0x2241186 0x2240b6c 0x2241186>;

			tps@24 {
				reg = <0x24>;
				compatible = "ti,tps65217";

				regulators {
					#address-cells = <0x1>;
					#size-cells = <0x0>;

					regulator@0 {
						reg = <0x0>;
						regulator-compatible = "dcdc1";
						regulator-always-on;
					};

					regulator@1 {
						reg = <0x1>;
						regulator-compatible = "dcdc2";
						regulator-name = "vdd_mpu";
						regulator-min-microvolt = <0xe1d48>;
						regulator-max-microvolt = <0x1506d0>;
						regulator-boot-on;
						regulator-always-on;
						linux,phandle = <0x4>;
						phandle = <0x4>;
					};

					regulator@2 {
						reg = <0x2>;
						regulator-compatible = "dcdc3";
						regulator-name = "vdd_core";
						regulator-min-microvolt = <0xe1d48>;
						regulator-max-microvolt = <0x118c30>;
						regulator-boot-on;
						regulator-always-on;
					};

					regulator@3 {
						reg = <0x3>;
						regulator-compatible = "ldo1";
						regulator-always-on;
					};

					regulator@4 {
						reg = <0x4>;
						regulator-compatible = "ldo2";
						regulator-always-on;
					};

					regulator@5 {
						reg = <0x5>;
						regulator-compatible = "ldo3";
						regulator-always-on;
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
					};

					regulator@6 {
						reg = <0x6>;
						regulator-compatible = "ldo4";
						regulator-always-on;
					};
				};
			};
		};

		i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c2";
			clocks = <0xe>;
			clock-names = "fck";
			reg = <0x4802a000 0x1000>;
			interrupts = <0x47>;
			status = "disabled";
		};

		i2c@4819c000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c3";
			clocks = <0xe>;
			clock-names = "fck";
			reg = <0x4819c000 0x1000>;
			interrupts = <0x1e>;
			status = "disabled";
		};

		spinlock@480ca000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x480ca000 0x1000>;
			ti,hwmods = "spinlock";
		};

		mmc@48060000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc1";
			clocks = <0x10 0x11>;
			clock-names = "fck", "mmchsdb_fck";
			ti,dual-volt;
			ti,needs-special-reset;
			ti,needs-special-hs-handling;
			dmas = <0x12 0x18 0x12 0x19>;
			dma-names = "tx", "rx";
			interrupts = <0x40>;
			interrupt-parent = <0x1>;
			reg = <0x48060000 0x1000>;
			status = "okay";
			bus-width = <0x4>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x13>;
			pinctrl-1 = <0x14>;
			cd-gpios = <0x15 0x6 0x0>;
			cd-inverted;
			vmmc-supply = <0x16>;
		};

		mmc@481d8000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc2";
			clocks = <0x10 0x11>;
			clock-names = "fck", "mmchsdb_fck";
			ti,needs-special-reset;
			dmas = <0x12 0x2 0x12 0x3>;
			dma-names = "tx", "rx";
			interrupts = <0x1c>;
			interrupt-parent = <0x1>;
			reg = <0x481d8000 0x1000>;
			status = "disabled";
		};

		mmc@47810000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc3";
			clocks = <0x10 0x11>;
			clock-names = "fck", "mmchsdb_fck";
			ti,needs-special-reset;
			interrupts = <0x1d>;
			interrupt-parent = <0x1>;
			reg = <0x47810000 0x1000>;
			status = "disabled";
		};

		wdt@44e35000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer2";
			clocks = <0x17>;
			clock-names = "fck";
			reg = <0x44e35000 0x1000>;
			interrupts = <0x5b>;
		};

		d_can@481cc000 {
			compatible = "bosch,d_can";
			ti,hwmods = "d_can0";
			clocks = <0x18>;
			clock-names = "fck";
			reg = <0x481cc000 0x2000 0x44e10644 0x4>;
			interrupts = <0x34>;
			status = "disabled";
		};

		d_can@481d0000 {
			compatible = "bosch,d_can";
			ti,hwmods = "d_can1";
			clocks = <0x19>;
			clock-names = "fck";
			reg = <0x481d0000 0x2000 0x44e10644 0x4>;
			interrupts = <0x37>;
			status = "disabled";
		};

		mailbox@480C8000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x480c8000 0x200>;
			interrupts = <0x4d>;
			ti,hwmods = "mailbox";
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0x8>;
			ti,mbox-names = "wkup_m3";
			ti,mbox-data = <0x0 0x0 0x0 0x0>;
		};

		timer@44e31000 {
			compatible = "ti,am335x-timer-1ms";
			reg = <0x44e31000 0x400>;
			interrupts = <0x43>;
			ti,hwmods = "timer1";
			clocks = <0x1a>;
			clock-names = "fck";
			ti,timer-alwon;
		};

		timer@48040000 {
			compatible = "ti,am335x-timer";
			reg = <0x48040000 0x400>;
			interrupts = <0x44>;
			ti,hwmods = "timer2";
			clocks = <0x1b>;
			clock-names = "fck";
		};

		timer@48042000 {
			compatible = "ti,am335x-timer";
			reg = <0x48042000 0x400>;
			interrupts = <0x45>;
			ti,hwmods = "timer3";
			clocks = <0x1c>;
			clock-names = "fck";
		};

		timer@48044000 {
			compatible = "ti,am335x-timer";
			reg = <0x48044000 0x400>;
			interrupts = <0x5c>;
			ti,hwmods = "timer4";
			clocks = <0x1d>;
			clock-names = "fck";
			ti,timer-pwm;
		};

		timer@48046000 {
			compatible = "ti,am335x-timer";
			reg = <0x48046000 0x400>;
			interrupts = <0x5d>;
			ti,hwmods = "timer5";
			clocks = <0x1e>;
			clock-names = "fck";
			ti,timer-pwm;
		};

		timer@48048000 {
			compatible = "ti,am335x-timer";
			reg = <0x48048000 0x400>;
			interrupts = <0x5e>;
			ti,hwmods = "timer6";
			clocks = <0x1f>;
			clock-names = "fck";
			ti,timer-pwm;
		};

		timer@4804a000 {
			compatible = "ti,am335x-timer";
			reg = <0x4804a000 0x400>;
			interrupts = <0x5f>;
			ti,hwmods = "timer7";
			clocks = <0x20>;
			clock-names = "fck";
			ti,timer-pwm;
		};

		rtc@44e3e000 {
			compatible = "ti,da830-rtc";
			reg = <0x44e3e000 0x1000>;
			interrupts = <0x4b 0x4c>;
			ti,hwmods = "rtc";
			clocks = <0x21>;
			clock-names = "fck";
		};

		spi@48030000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg = <0x48030000 0x400>;
			interrupts = <0x41>;
			ti,spi-num-cs = <0x2>;
			ti,hwmods = "spi0";
			clocks = <0xe>;
			clock-names = "fck";
			dmas = <0x12 0x10 0x12 0x11 0x12 0x12 0x12 0x13>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		spi@481a0000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg = <0x481a0000 0x400>;
			interrupts = <0x7d>;
			ti,spi-num-cs = <0x2>;
			ti,hwmods = "spi1";
			clocks = <0xe>;
			clock-names = "fck";
			dmas = <0x12 0x2a 0x12 0x2b 0x12 0x2c 0x12 0x2d>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x22>;

			video@0 {
				compatible = "ilitek,ili9225";
				spi-max-frequency = <0xf42400>;
				reg = <0x0>;
				spi-cpol;
				spi-cpha;
			};
		};

		usb@47400000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47400000 0x1000>;
			ranges;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ti,hwmods = "usb_otg_hs";
			status = "okay";
			clocks = <0x23>;
			clock-names = "fck";

			control@44e10000 {
				compatible = "ti,am335x-usb-ctrl-module";
				reg = <0x44e10620 0x10 0x44e10648 0x4>;
				reg-names = "phy_ctrl", "wakeup";
				status = "okay";
				linux,phandle = <0x24>;
				phandle = <0x24>;
			};

			usb-phy@47401300 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401300 0x100>;
				reg-names = "phy";
				status = "okay";
				ti,ctrl_mod = <0x24>;
				linux,phandle = <0x25>;
				phandle = <0x25>;
			};

			usb@47401000 {
				compatible = "ti,musb-am33xx";
				status = "okay";
				reg = <0x47401400 0x400 0x47401000 0x200>;
				reg-names = "mc", "control";
				interrupts = <0x12>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <0x1>;
				mentor,num-eps = <0x10>;
				mentor,ram-bits = <0xc>;
				mentor,power = <0x1f4>;
				phys = <0x25>;
				dmas = <0x26 0x0 0x0 0x26 0x1 0x0 0x26 0x2 0x0 0x26 0x3 0x0 0x26 0x4 0x0 0x26 0x5 0x0 0x26 0x6 0x0 0x26 0x7 0x0 0x26 0x8 0x0 0x26 0x9 0x0 0x26 0xa 0x0 0x26 0xb 0x0 0x26 0xc 0x0 0x26 0xd 0x0 0x26 0xe 0x0 0x26 0x0 0x1 0x26 0x1 0x1 0x26 0x2 0x1 0x26 0x3 0x1 0x26 0x4 0x1 0x26 0x5 0x1 0x26 0x6 0x1 0x26 0x7 0x1 0x26 0x8 0x1 0x26 0x9 0x1 0x26 0xa 0x1 0x26 0xb 0x1 0x26 0xc 0x1 0x26 0xd 0x1 0x26 0xe 0x1>;
				dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15";
			};

			usb-phy@47401b00 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401b00 0x100>;
				reg-names = "phy";
				status = "okay";
				ti,ctrl_mod = <0x24>;
				linux,phandle = <0x27>;
				phandle = <0x27>;
			};

			usb@47401800 {
				compatible = "ti,musb-am33xx";
				status = "okay";
				reg = <0x47401c00 0x400 0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <0x13>;
				interrupt-names = "mc";
				dr_mode = "host";
				mentor,multipoint = <0x1>;
				mentor,num-eps = <0x10>;
				mentor,ram-bits = <0xc>;
				mentor,power = <0x1f4>;
				phys = <0x27>;
				dmas = <0x26 0xf 0x0 0x26 0x10 0x0 0x26 0x11 0x0 0x26 0x12 0x0 0x26 0x13 0x0 0x26 0x14 0x0 0x26 0x15 0x0 0x26 0x16 0x0 0x26 0x17 0x0 0x26 0x18 0x0 0x26 0x19 0x0 0x26 0x1a 0x0 0x26 0x1b 0x0 0x26 0x1c 0x0 0x26 0x1d 0x0 0x26 0xf 0x1 0x26 0x10 0x1 0x26 0x11 0x1 0x26 0x12 0x1 0x26 0x13 0x1 0x26 0x14 0x1 0x26 0x15 0x1 0x26 0x16 0x1 0x26 0x17 0x1 0x26 0x18 0x1 0x26 0x19 0x1 0x26 0x1a 0x1 0x26 0x1b 0x1 0x26 0x1c 0x1 0x26 0x1d 0x1>;
				dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15";
			};

			dma-controller@07402000 {
				compatible = "ti,am3359-cppi41";
				reg = <0x47400000 0x1000 0x47402000 0x1000 0x47403000 0x1000 0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <0x11>;
				interrupt-names = "glue";
				#dma-cells = <0x2>;
				#dma-channels = <0x1e>;
				#dma-requests = <0x100>;
				status = "okay";
				linux,phandle = <0x26>;
				phandle = <0x26>;
			};
		};

		epwmss@48300000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48300000 0x10>;
			ti,hwmods = "epwmss0";
			clocks = <0x8>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			ranges = <0x48300100 0x48300100 0x80 0x48300180 0x48300180 0x80 0x48300200 0x48300200 0x80>;

			ecap@48300100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <0x3>;
				reg = <0x48300100 0x80>;
				ti,hwmods = "ecap0";
				clocks = <0x8>;
				clock-names = "fck";
				status = "disabled";
			};

			ehrpwm@48300200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <0x3>;
				reg = <0x48300200 0x80>;
				ti,hwmods = "ehrpwm0";
				clocks = <0x8>;
				clock-names = "fck";
				status = "disabled";
			};
		};

		epwmss@48302000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48302000 0x10>;
			ti,hwmods = "epwmss1";
			clocks = <0x8>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			ranges = <0x48302100 0x48302100 0x80 0x48302180 0x48302180 0x80 0x48302200 0x48302200 0x80>;

			ecap@48302100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <0x3>;
				reg = <0x48302100 0x80>;
				ti,hwmods = "ecap1";
				clocks = <0x8>;
				clock-names = "fck";
				status = "disabled";
			};

			ehrpwm@48302200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <0x3>;
				reg = <0x48302200 0x80>;
				ti,hwmods = "ehrpwm1";
				clocks = <0x8>;
				clock-names = "fck";
				status = "disabled";
			};
		};

		epwmss@48304000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48304000 0x10>;
			ti,hwmods = "epwmss2";
			clocks = <0x8>;
			clock-names = "fck";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			ranges = <0x48304100 0x48304100 0x80 0x48304180 0x48304180 0x80 0x48304200 0x48304200 0x80>;

			ecap@48304100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <0x3>;
				reg = <0x48304100 0x80>;
				ti,hwmods = "ecap2";
				clocks = <0x8>;
				clock-names = "fck";
				status = "disabled";
			};

			ehrpwm@48304200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <0x3>;
				reg = <0x48304200 0x80>;
				ti,hwmods = "ehrpwm2";
				clocks = <0x8>;
				clock-names = "fck";
				status = "disabled";
			};
		};

		ethernet@4a100000 {
			compatible = "ti,cpsw";
			ti,hwmods = "cpgmac0";
			clocks = <0x28 0x29>;
			clock-names = "fck", "cpts";
			cpdma_channels = <0x8>;
			ale_entries = <0x400>;
			bd_ram_size = <0x2000>;
			no_bd_ram = <0x0>;
			rx_descs = <0x40>;
			mac_control = <0x20>;
			slaves = <0x1>;
			active_slave = <0x0>;
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <0x1d>;
			reg = <0x4a100000 0x800 0x4a101200 0x100>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			interrupt-parent = <0x1>;
			interrupts = <0x28 0x29 0x2a 0x2b>;
			ranges;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x2a>;
			pinctrl-1 = <0x2b>;

			mdio@4a101000 {
				compatible = "ti,davinci_mdio";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				ti,hwmods = "davinci_mdio";
				clocks = <0x28>;
				clock-names = "fck";
				bus_freq = <0xf4240>;
				reg = <0x4a101000 0x100>;
				pinctrl-names = "default", "sleep";
				pinctrl-0 = <0x2c>;
				pinctrl-1 = <0x2d>;
				linux,phandle = <0x2e>;
				phandle = <0x2e>;
			};

			slave@4a100200 {
				mac-address = [00 00 00 00 00 00];
				phy_id = <0x2e 0x0>;
				phy-mode = "mii";
			};

			slave@4a100300 {
				mac-address = [00 00 00 00 00 00];
			};

			cpsw-phy-sel@44e10650 {
				compatible = "ti,am3352-cpsw-phy-sel";
				reg = <0x44e10650 0x4>;
				reg-names = "gmii-sel";
			};
		};

		ocmcram@40300000 {
			compatible = "ti,am3352-ocmcram";
			reg = <0x40300000 0x10000>;
			ti,hwmods = "ocmcram";
			clocks = <0x5>;
			clock-names = "fck";
		};

		wkup_m3@44d00000 {
			compatible = "ti,am3353-wkup-m3";
			reg = <0x44d00000 0x4000 0x44d80000 0x2000 0x44e11324 0x24>;
			reg-names = "m3_umem", "m3_dmem", "ipc_regs";
			interrupts = <0x4e>;
			ti,hwmods = "wkup_m3";
			ti,no-reset;
			clocks = <0x6>;
			clock-names = "fck";
			resets = <0x2f 0x1>;
		};

		elm@48080000 {
			compatible = "ti,am3352-elm";
			reg = <0x48080000 0x2000>;
			interrupts = <0x4>;
			ti,hwmods = "elm";
			clocks = <0x8>;
			clock-names = "fck";
			status = "disabled";
		};

		tscadc@44e0d000 {
			compatible = "ti,am3359-tscadc";
			reg = <0x44e0d000 0x1000>;
			interrupt-parent = <0x1>;
			interrupts = <0x10>;
			ti,hwmods = "adc_tsc";
			clocks = <0x30>;
			clock-names = "fck";
			status = "disabled";

			tsc {
				compatible = "ti,am3359-tsc";
			};

			adc {
				#io-channel-cells = <0x1>;
				compatible = "ti,am3359-adc";
			};
		};

		gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			ti,no-idle;
			clocks = <0x31>;
			clock-names = "fck";
			reg = <0x50000000 0x2000>;
			interrupts = <0x64>;
			gpmc,num-cs = <0x7>;
			gpmc,num-waitpins = <0x2>;
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			status = "disabled";
		};

		prcm@44e00000 {
			compatible = "ti,am3352-prcm";
			reg = <0x44e00000 0x1300>;
			#reset-cells = <0x1>;
			linux,phandle = <0x2f>;
			phandle = <0x2f>;
		};

		sgx@0x56000000 {
			compatible = "ti,sgx";
			ti,hwmods = "gfx";
			reg = <0x56000000 0x1000000>;
			interrupts = <0x25>;
			resets = <0x2f 0x0>;
		};

		sham@53100000 {
			compatible = "ti,omap4-sham";
			ti,hwmods = "sham";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg = <0x53100000 0x200>;
			interrupt-parent = <0x1>;
			interrupts = <0x6d>;
			dmas = <0x12 0x24>;
			dma-names = "rx";
			clocks = <0x5>;
			clock-names = "fck";
		};

		aes@53500000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg = <0x53500000 0xa0>;
			interrupt-parent = <0x1>;
			interrupts = <0x67>;
			dmas = <0x12 0x6 0x12 0x5>;
			dma-names = "tx", "rx";
			clocks = <0x32>;
			clock-names = "fck";
		};

		rng@48310000 {
			compatible = "ti,omap4-rng";
			ti,hwmods = "rng";
			reg = <0x48310000 0x2000>;
			interrupts = <0x6f>;
			clocks = <0x33>;
			clock-names = "fck";
		};

		lcdc@0x4830e000 {
			compatible = "ti,am33xx-tilcdc";
			reg = <0x4830e000 0x1000>;
			interrupt-parent = <0x1>;
			interrupts = <0x24>;
			clocks = <0x34>;
			clock-names = "fck";
			ti,hwmods = "lcdc";
			status = "disabled";
		};

		mcasp@48038000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp0";
			reg = <0x48038000 0x2000 0x46000000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <0x50 0x51>;
			interrupts-names = "tx", "rx";
			status = "disabled";
			dmas = <0x12 0x8 0x12 0x9>;
			dma-names = "tx", "rx";
			clocks = <0x35>;
			clock-names = "fck";
		};

		mcasp@4803C000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp1";
			reg = <0x4803c000 0x2000 0x46400000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <0x52 0x53>;
			interrupts-names = "tx", "rx";
			status = "disabled";
			dmas = <0x12 0xa 0x12 0xb>;
			dma-names = "tx", "rx";
			clocks = <0x36>;
			clock-names = "fck";
		};

		efuse@0x44e107fc {
			compatible = "ti,opp-omap-am3352";
			reg = <0x44e107fc 0x4 0x44e10600 0x4>;
			ti,efuse-bit-enable-low;

			mpu_opp_modifier {
				opp-modifier = <0xf4240 0x40002 0x0 0x200 0xc3500 0x40002 0x0 0x100 0xafc80 0x40002 0x0 0x80 0x927c0 0x40002 0x0 0x40 0x493e0 0x40003 0x0 0x0 0xf4240 0x40001 0x0 0x0 0xc3500 0x40001 0x0 0x0 0xafc80 0x60001 0x0 0x0 0x927c0 0x60001 0x0 0x0 0x7a120 0x20001 0x0 0x0 0x43238 0x20001 0x0 0x0>;
				linux,phandle = <0x2>;
				phandle = <0x2>;
			};
		};
	};

	clocks {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;

		clk_32768_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0x8000>;
			linux,phandle = <0x21>;
			phandle = <0x21>;
		};

		clk_rc32k_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0x7d00>;
			linux,phandle = <0x48>;
			phandle = <0x48>;
		};

		virt_19200000_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0x124f800>;
			linux,phandle = <0x37>;
			phandle = <0x37>;
		};

		virt_24000000_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0x16e3600>;
			linux,phandle = <0x38>;
			phandle = <0x38>;
		};

		virt_25000000_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0x17d7840>;
			linux,phandle = <0x39>;
			phandle = <0x39>;
		};

		virt_26000000_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0x18cba80>;
			linux,phandle = <0x3a>;
			phandle = <0x3a>;
		};

		sys_clkin_ck@44e10040 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x37 0x38 0x39 0x3a>;
			bit-shift = <0x16>;
			reg = <0x44e10040 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x3b>;
			phandle = <0x3b>;
		};

		tclkin_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-clock";
			clock-frequency = <0xb71b00>;
			linux,phandle = <0x47>;
			phandle = <0x47>;
		};

		dpll_core_ck@44e00490 {
			#clock-cells = <0x0>;
			compatible = "ti,omap4-dpll-core-clock";
			clocks = <0x3b 0x3b>;
			reg = <0x44e00490 0x4 0x44e0045c 0x4 0x44e00468 0x4>;
			reg-names = "control", "idlest", "mult-div1";
			linux,phandle = <0x3c>;
			phandle = <0x3c>;
		};

		dpll_core_x2_ck {
			#clock-cells = <0x0>;
			compatible = "ti,omap4-dpll-x2-clock";
			clocks = <0x3c>;
			linux,phandle = <0x3d>;
			phandle = <0x3d>;
		};

		dpll_core_m4_ck@44e00480 {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x3d>;
			reg = <0x44e00480 0x4>;
			bit-mask = <0x1f>;
			index-starts-at-one;
			linux,phandle = <0x45>;
			phandle = <0x45>;
		};

		dpll_core_m5_ck@44e00484 {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x3d>;
			reg = <0x44e00484 0x4>;
			bit-mask = <0x1f>;
			index-starts-at-one;
			linux,phandle = <0x49>;
			phandle = <0x49>;
		};

		dpll_core_m6_ck@44e004d8 {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x3d>;
			reg = <0x44e004d8 0x4>;
			bit-mask = <0x1f>;
			index-starts-at-one;
		};

		dpll_mpu_ck@44e00488 {
			#clock-cells = <0x0>;
			compatible = "ti,omap4-dpll-clock";
			clocks = <0x3b 0x3b>;
			reg = <0x44e00488 0x4 0x44e00420 0x4 0x44e0042c 0x4>;
			reg-names = "control", "idlest", "mult-div1";
			linux,phandle = <0x3>;
			phandle = <0x3>;
		};

		dpll_mpu_m2_ck@44e004a8 {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x3>;
			reg = <0x44e004a8 0x4>;
			bit-mask = <0x1f>;
			index-starts-at-one;
		};

		dpll_ddr_ck@44e00494 {
			#clock-cells = <0x0>;
			compatible = "ti,omap4-dpll-no-gate-clock";
			clocks = <0x3b 0x3b>;
			reg = <0x44e00494 0x4 0x44e00434 0x4 0x44e00440 0x4>;
			reg-names = "control", "idlest", "mult-div1";
			linux,phandle = <0x3e>;
			phandle = <0x3e>;
		};

		dpll_ddr_m2_ck@44e004a0 {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x3e>;
			reg = <0x44e004a0 0x4>;
			bit-mask = <0x1f>;
			index-starts-at-one;
			linux,phandle = <0x3f>;
			phandle = <0x3f>;
		};

		dpll_ddr_m2_div2_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3f>;
			clock-mult = <0x1>;
			clock-div = <0x2>;
		};

		dpll_disp_ck@44e00498 {
			#clock-cells = <0x0>;
			compatible = "ti,omap4-dpll-no-gate-clock";
			clocks = <0x3b 0x3b>;
			reg = <0x44e00498 0x4 0x44e00448 0x4 0x44e00454 0x4>;
			reg-names = "control", "idlest", "mult-div1";
			linux,phandle = <0x40>;
			phandle = <0x40>;
		};

		dpll_disp_m2_ck@44e004a4 {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x40>;
			reg = <0x44e004a4 0x4>;
			bit-mask = <0x1f>;
			index-starts-at-one;
			set-rate-parent;
			linux,phandle = <0x46>;
			phandle = <0x46>;
		};

		dpll_per_ck@44e0048c {
			#clock-cells = <0x0>;
			compatible = "ti,omap4-dpll-no-gate-j-type-clock";
			clocks = <0x3b 0x3b>;
			reg = <0x44e0048c 0x4 0x44e00470 0x4 0x44e0049c 0x4>;
			reg-names = "control", "idlest", "mult-div1";
			linux,phandle = <0x41>;
			phandle = <0x41>;
		};

		dpll_per_m2_ck@44e004ac {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x41>;
			reg = <0x44e004ac 0x4>;
			bit-mask = <0x1f>;
			index-starts-at-one;
			linux,phandle = <0x42>;
			phandle = <0x42>;
		};

		dpll_per_m2_div4_wkupdm_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x42>;
			clock-mult = <0x1>;
			clock-div = <0x4>;
			linux,phandle = <0xc>;
			phandle = <0xc>;
		};

		dpll_per_m2_div4_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x42>;
			clock-mult = <0x1>;
			clock-div = <0x4>;
			linux,phandle = <0xe>;
			phandle = <0xe>;
		};

		adc_tsc_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x30>;
			phandle = <0x30>;
		};

		cefuse_fck@44e00a20 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x3b>;
			bit-shift = <0x1>;
			reg = <0x44e00a20 0x4>;
		};

		clk_24mhz {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x42>;
			clock-mult = <0x1>;
			clock-div = <0x8>;
			linux,phandle = <0x43>;
			phandle = <0x43>;
		};

		clkdiv32k_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x43>;
			clock-mult = <0x1>;
			clock-div = <0x2dc>;
			linux,phandle = <0x44>;
			phandle = <0x44>;
		};

		clkdiv32k_ick@44e0014c {
			#clock-cells = <0x0>;
			compatible = "ti,gate-clock";
			clocks = <0x44>;
			reg = <0x44e0014c 0x4>;
			bit-shift = <0x1>;
			linux,phandle = <0x11>;
			phandle = <0x11>;
		};

		dcan0_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x18>;
			phandle = <0x18>;
		};

		dcan1_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x19>;
			phandle = <0x19>;
		};

		l3_gclk {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x45>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x5>;
			phandle = <0x5>;
		};

		pruss_ocp_gclk@44e00530 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x5 0x46>;
			reg = <0x44e00530 0x4>;
			bit-mask = <0x1>;
		};

		mcasp0_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x35>;
			phandle = <0x35>;
		};

		mcasp1_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x36>;
			phandle = <0x36>;
		};

		mmu_fck@44e00914 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x45>;
			bit-shift = <0x1>;
			reg = <0x44e00914 0x4>;
		};

		smartreflex0_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
		};

		smartreflex1_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
		};

		sha0_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
		};

		rng_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x33>;
			phandle = <0x33>;
		};

		aes0_fck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x3b>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x32>;
			phandle = <0x32>;
		};

		timer1_fck@44e00528 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x3b 0x11 0x47 0x48 0x21>;
			reg = <0x44e00528 0x4>;
			bit-mask = <0x7>;
			linux,phandle = <0x1a>;
			phandle = <0x1a>;
		};

		timer2_fck@44e00508 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x47 0x3b 0x11>;
			reg = <0x44e00508 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x1b>;
			phandle = <0x1b>;
		};

		timer3_fck@44e0050c {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x47 0x3b 0x11>;
			reg = <0x44e0050c 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x1c>;
			phandle = <0x1c>;
		};

		timer4_fck@44e00510 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x47 0x3b 0x11>;
			reg = <0x44e00510 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x1d>;
			phandle = <0x1d>;
		};

		timer5_fck@44e00518 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x47 0x3b 0x11>;
			reg = <0x44e00518 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x1e>;
			phandle = <0x1e>;
		};

		timer6_fck@44e0051c {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x47 0x3b 0x11>;
			reg = <0x44e0051c 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x1f>;
			phandle = <0x1f>;
		};

		timer7_fck@44e00504 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x47 0x3b 0x11>;
			reg = <0x44e00504 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x20>;
			phandle = <0x20>;
		};

		usbotg_fck@44e0047c {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x41>;
			bit-shift = <0x8>;
			reg = <0x44e0047c 0x4>;
			linux,phandle = <0x23>;
			phandle = <0x23>;
		};

		dpll_core_m4_div2_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x45>;
			clock-mult = <0x1>;
			clock-div = <0x2>;
			linux,phandle = <0x6>;
			phandle = <0x6>;
		};

		ieee5000_fck@44e000e4 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x6>;
			bit-shift = <0x1>;
			reg = <0x44e000e4 0x4>;
		};

		wdt1_fck@44e00538 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x48 0x11>;
			reg = <0x44e00538 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x17>;
			phandle = <0x17>;
		};

		l4_rtc_gclk {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x45>;
			clock-mult = <0x1>;
			clock-div = <0x2>;
		};

		l4hs_gclk {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x45>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
		};

		l3s_gclk {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x6>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x31>;
			phandle = <0x31>;
		};

		l4fw_gclk {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x6>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
		};

		l4ls_gclk {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x6>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
			linux,phandle = <0x8>;
			phandle = <0x8>;
		};

		sysclk_div_ck {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x45>;
			clock-mult = <0x1>;
			clock-div = <0x1>;
		};

		cpsw_125mhz_gclk {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x49>;
			clock-mult = <0x1>;
			clock-div = <0x2>;
			linux,phandle = <0x28>;
			phandle = <0x28>;
		};

		cpsw_cpts_rft_clk@44e00520 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x49 0x45>;
			reg = <0x44e00520 0x4>;
			bit-mask = <0x1>;
			linux,phandle = <0x29>;
			phandle = <0x29>;
		};

		gpio0_dbclk_mux_ck@44e0053c {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x48 0x21 0x11>;
			reg = <0x44e0053c 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x4a>;
			phandle = <0x4a>;
		};

		gpio0_dbclk@44e00408 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x4a>;
			bit-shift = <0x12>;
			reg = <0x44e00408 0x4>;
			linux,phandle = <0x7>;
			phandle = <0x7>;
		};

		gpio1_dbclk@44e000ac {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x11>;
			bit-shift = <0x12>;
			reg = <0x44e000ac 0x4>;
			linux,phandle = <0x9>;
			phandle = <0x9>;
		};

		gpio2_dbclk@44e000b0 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x11>;
			bit-shift = <0x12>;
			reg = <0x44e000b0 0x4>;
			linux,phandle = <0xa>;
			phandle = <0xa>;
		};

		gpio3_dbclk@44e000b4 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x11>;
			bit-shift = <0x12>;
			reg = <0x44e000b4 0x4>;
			linux,phandle = <0xb>;
			phandle = <0xb>;
		};

		lcd_gclk@44e00534 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x46 0x49 0x42>;
			reg = <0x44e00534 0x4>;
			bit-mask = <0x3>;
			set-rate-parent;
			linux,phandle = <0x34>;
			phandle = <0x34>;
		};

		mmc_clk {
			#clock-cells = <0x0>;
			compatible = "fixed-factor-clock";
			clocks = <0x42>;
			clock-mult = <0x1>;
			clock-div = <0x2>;
			linux,phandle = <0x10>;
			phandle = <0x10>;
		};

		gfx_fclk_clksel_ck@44e0052c {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x45 0x42>;
			bit-shift = <0x1>;
			reg = <0x44e0052c 0x4>;
			bit-mask = <0x1>;
			linux,phandle = <0x4b>;
			phandle = <0x4b>;
		};

		gfx_fck_div_ck@44e0052c {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x4b>;
			reg = <0x44e0052c 0x4>;
			table = <0x1 0x0 0x2 0x1>;
			bit-mask = <0x1>;
		};

		sysclkout_pre_ck@44e00700 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x21 0x5 0x3f 0x42 0x34>;
			reg = <0x44e00700 0x4>;
			bit-mask = <0x7>;
			linux,phandle = <0x4c>;
			phandle = <0x4c>;
		};

		clkout2_div_ck@44e00700 {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x4c>;
			bit-shift = <0x3>;
			reg = <0x44e00700 0x4>;
			table = <0x1 0x0 0x2 0x1 0x3 0x2 0x4 0x3 0x5 0x4 0x6 0x5 0x7 0x6 0x8 0x7>;
			bit-mask = <0x7>;
			linux,phandle = <0x51>;
			phandle = <0x51>;
		};

		dbg_sysclk_ck@44e00414 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x3b>;
			bit-shift = <0x13>;
			reg = <0x44e00414 0x4>;
			linux,phandle = <0x4d>;
			phandle = <0x4d>;
		};

		dbg_clka_ck@44e00414 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x45>;
			bit-shift = <0x1e>;
			reg = <0x44e00414 0x4>;
			linux,phandle = <0x4e>;
			phandle = <0x4e>;
		};

		stm_pmd_clock_mux_ck@44e00414 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x4d 0x4e>;
			bit-shift = <0x16>;
			reg = <0x44e00414 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x4f>;
			phandle = <0x4f>;
		};

		trace_pmd_clk_mux_ck@44e00414 {
			#clock-cells = <0x0>;
			compatible = "mux-clock";
			clocks = <0x4d 0x4e>;
			bit-shift = <0x14>;
			reg = <0x44e00414 0x4>;
			bit-mask = <0x3>;
			linux,phandle = <0x50>;
			phandle = <0x50>;
		};

		stm_clk_div_ck@44e00414 {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x4f>;
			bit-shift = <0x1b>;
			reg = <0x44e00414 0x4>;
			bit-mask = <0x7>;
			index-power-of-two;
		};

		trace_clk_div_ck@44e00414 {
			#clock-cells = <0x0>;
			compatible = "divider-clock";
			clocks = <0x50>;
			bit-shift = <0x18>;
			reg = <0x44e00414 0x4>;
			bit-mask = <0x7>;
			index-power-of-two;
		};

		clkout2_ck@44e00700 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x51>;
			bit-shift = <0x7>;
			reg = <0x44e00700 0x4>;
		};

		ehrpwm0_tbclk@44e10664 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x42>;
			bit-shift = <0x0>;
			reg = <0x44e10664 0x4>;
		};

		ehrpwm1_tbclk@44e10664 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x42>;
			bit-shift = <0x1>;
			reg = <0x44e10664 0x4>;
		};

		ehrpwm2_tbclk@44e10664 {
			#clock-cells = <0x0>;
			compatible = "gate-clock";
			clocks = <0x42>;
			bit-shift = <0x2>;
			reg = <0x44e10664 0x4>;
		};
	};

	clockdomains {

		clk_24mhz_clkdm {
			compatible = "ti,clockdomain";
			clocks = <0x11>;
		};
	};

	leds {
		pinctrl-names = "default", "sleep";
		pinctrl-0 = <0x52>;
		pinctrl-1 = <0x53>;
		compatible = "gpio-leds";

		led@2 {
			label = "beaglebone:green:heartbeat";
			gpios = <0x54 0x15 0x0>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led@3 {
			label = "beaglebone:green:mmc0";
			gpios = <0x54 0x16 0x0>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led@4 {
			label = "beaglebone:green:usr2";
			gpios = <0x54 0x17 0x0>;
			linux,default-trigger = "cpu0";
			default-state = "off";
		};

		led@5 {
			label = "beaglebone:green:usr3";
			gpios = <0x54 0x18 0x0>;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};
	};

	fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		linux,phandle = <0x16>;
		phandle = <0x16>;
	};
};